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CUDA-x86.

About compiler parallelization strategy/info

 
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teodoro



Joined: 21 Sep 2012
Posts: 4

PostPosted: Thu Oct 04, 2012 4:40 pm    Post subject: About compiler parallelization strategy/info Reply with quote

Hi,

Yes there a way I could access details about the loop parallelized by the compiler. For instance, the instruction count in a given parallel loop/section?

It may be ask tool much and is possible not available, but it would be useful as well to undertand the expected performance of a section in general. Does the compiler create models for that during the compilation, what is reasonable in order to decided among parallelization strategies. Is any of this information available?

George
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mkcolg



Joined: 30 Jun 2004
Posts: 6129
Location: The Portland Group Inc.

PostPosted: Fri Oct 05, 2012 7:50 am    Post subject: Reply with quote

Hi George,

Are you asking about CPU code instructions or GPU?

For the CPU, you can use the PGI utility pgcollect to perform sample based profiling and then use the PGI Profiler pgprof to drill down into the the assembly. You can also instrument your code using the flag "-Mprof=lines". It's a slower to run and is at the line level rather than assembly, but is more accurate than sample based profiling. Other usefully 3rd party profilers are Oprofile and TAU.

For the GPU, we provide basic profiling information (data movement and kernel time). for more in depth profiling, you can use NVIDIA's CUDA Profiler. It doesn't give instruction counts, but does give a lot of useful information.

For complete detail about PGI's profiling tools please see the PGPROF Users Guide.

Hope this helps,
Mat
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